How to Generate a 5G Waveform for SystemVerilog Verification Using 5G Toolbox
One of the challenges in RTL verification is developing realistic directed tests. New standards like the 3GPP 5G New Radio (NR) standard require deep domain expertise, making it even more challenging to create a standard-compliant waveform verification model.
5G Toolbox™ provides standard-compliant functions and examples for the modeling, simulation, and verification of 5G communications systems to ensure they comply with the 5G NR standard. This video shows how to use HDL Verifier™ to automatically generate a SystemVerilog verification component from a 5G Toolbox function that synthesizes a realistic waveform with parameters you can adjust in SystemVerilog, along with some of the more common steps you will go through in the process, including:
- Partitioning the MATLAB® test bench from the algorithm and defining what is parameterizable
- Converting the MATLAB function output to fixed point
- Addressing coding style issues that prevent C code generation
- Integrating the generated SystemVerilog DPI component into a simple test bench
5G Toolbox™ provides standard-compliant functions and examples for the modeling, simulation, and verification of 5G communications systems to ensure they comply with the 5G NR standard. This video shows how to use HDL Verifier™ to automatically generate a SystemVerilog verification component from a 5G Toolbox function that synthesizes a realistic waveform with parameters you can adjust in SystemVerilog, along with some of the more common steps you will go through in the process, including:
- Partitioning the MATLAB® test bench from the algorithm and defining what is parameterizable
- Converting the MATLAB function output to fixed point
- Addressing coding style issues that prevent C code generation
- Integrating the generated SystemVerilog DPI component into a simple test bench
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