Learn to use FPGAs for Motor Control with Simulink

 FPGAs for Motor Control is becoming a pivotal technology in the development of high frequency switching power electronics and motor control systems, driven by highly mathematical computing algorithms. To implement such algorithms, engineers are increasingly looking towards System on Chip (SoC) devices, which blend the familiarity of embedded processors with the capabilities of FPGAs for parallel processing and deterministic behavior.

In this session you will learn how to use Simulink to deploy a field-oriented control (FOC) algorithm, onto an AMD-Xilinx Zynq UltraScale+ SoC device, with minimal need for deep FPGA programming knowledge. Using model-based design we will control a permanent magnet synchronous motor (PMSM), illustrate the process of automatically generating C and HDL code for the ARM Cortex processor and FPGA fabric within the SoC device. The techniques are demonstrated using the Trenz Electronics Motor Control Development kit.

Highlights:

Model, Simulate, Test and Deploy the FOC algorithm onto Zynq UltraScale+ SoC Device.

Explore the partition the design for ideal division of tasks between the ARM and FPGA.

Automate deployment of the algorithm into reference frameworks for the processor and programmable logic.

Learn more about FPGA development: https://bit.ly/3IDqRgq

Chapters:

00:32 Learn how to use FPGAs for Motor control with Simulink

01:08 Overview of Model-Based Design for FPGAs

01:47 Motivation to use of FPGAs for motor control

03:20 Advantages of SoC Devices for control engineers

04:08 Model-Based Design Workflow

05:20 Simulink for Control Algorithms

05:50 Introduction to Motor Control Blockset

07:00 Introduction to the Trenz Electronic Motor Control Dev kit

08:05 Introduction to Field Oriented Control algorithm model

09:20 Introduction to HDL Coder

10:20 System Testbench in Simulink

11:05 Introduction to Hardware Support Package

11:50 Hardware-Software Partition

12:30 Generating C Code

13:02 Generating the HDL IP core

13:50 Reference design interface

14:50 Generating the HDL code

15:35 Introduction to Fixed-Point Conversion

16:15 Embedded system integration

17:00 Run the model on hardware

17:45 Key Takeaways